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Searched refs:SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1557 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Dsdma1_4_2_sh_mask.h1565 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h1573 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_4_sh_mask.h1942 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h2890 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h3004 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT 0x2 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4175 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4117 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4294 #define SDMA1_RLC0_CSA_ADDR_LO__ADDR__SHIFT … macro