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Searched refs:SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1335 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h1529 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Dsdma0_4_2_2_sh_mask.h1548 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT … macro
H A Dsdma0_4_2_sh_mask.h1538 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1196 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_2_4_sh_mask.h1316 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_3_0_1_sh_mask.h1766 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2 macro
H A Doss_3_0_sh_mask.h2082 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT 0x2 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h1332 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h1321 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h1350 #define SDMA0_RLC0_RB_RPTR_ADDR_LO__ADDR__SHIFT … macro