Home
last modified time | relevance | path

Searched refs:SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT (Results 1 – 17 of 17) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_cik.c234 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; in update_mqd_sdma()
H A Dkfd_mqd_manager_vi.c368 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; in update_mqd_sdma()
H A Dkfd_mqd_manager_v10.c372 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; in update_mqd_sdma()
H A Dkfd_mqd_manager_v9.c467 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT; in update_mqd_sdma()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_sh_mask.h1291 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
H A Dsdma0_4_0_sh_mask.h1485 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Dsdma0_4_2_2_sh_mask.h1503 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
H A Dsdma0_4_2_sh_mask.h1493 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1168 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Doss_2_4_sh_mask.h1288 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Doss_3_0_1_sh_mask.h1736 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
H A Doss_3_0_sh_mask.h2052 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v5_2.c791 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT | in sdma_v5_2_mqd_init()
H A Dsdma_v5_0.c943 6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT | in sdma_v5_0_mqd_init()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h1287 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h1275 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h1304 #define SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT … macro