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Searched refs:SDMA0_BASE (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Daldebaran_reg_init.c43 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in aldebaran_reg_base_init()
H A Darct_reg_init.c44 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in arct_reg_base_init()
H A Dvega10_reg_init.c47 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in vega10_reg_base_init()
H A Dvega20_reg_init.c46 adev->reg_offset[SDMA0_HWIP][i] = (uint32_t *)(&(SDMA0_BASE.instance[i])); in vega20_reg_base_init()
/openbmc/linux/drivers/gpu/drm/amd/include/
H A Dvega20_ip_offset.h111 static const struct IP_BASE SDMA0_BASE ={ { { { 0x00001260, 0, 0, 0, 0, 0 } }, variable
H A Dsienna_cichlid_ip_offset.h151 static const struct IP_BASE SDMA0_BASE = { { { { 0x00001260, 0x0000A000, 0x0001C000, 0x02402C00, 0 … variable
H A Dbeige_goby_ip_offset.h159 static const struct IP_BASE SDMA0_BASE = { { { { 0x00001260, 0x0000A000, 0x0001C000, 0x02402C00, 0,… variable
H A Drenoir_ip_offset.h191 static const struct IP_BASE SDMA0_BASE ={ { { { 0x00001260, 0x0240A800, 0, 0, 0 } }, variable
H A Dvega10_ip_offset.h168 static const struct IP_BASE __maybe_unused SDMA0_BASE = { { { { 0x00001260, 0, 0, 0, 0 } }, variable
H A Dyellow_carp_offset.h152 static const struct IP_BASE SDMA0_BASE = { { { { 0x00001260, 0x0000A000, 0x02402C00, 0, 0, 0 } }, variable
H A Darct_ip_offset.h135 static const struct IP_BASE SDMA0_BASE ={ { { { 0x00001260, 0x00012540, 0x0040A800, 0, 0… variable
H A Daldebaran_ip_offset.h168 static const struct IP_BASE SDMA0_BASE = { { { { 0x00001260, 0x00012540, 0x0040A800, 0, 0, 0 } }, variable