Searched refs:SCTLR_EL1_DCACHE_DIS (Results 1 – 2 of 2) sorted by relevance
/openbmc/u-boot/arch/arm/include/asm/ | ||
H A D | system.h | 107 #define SCTLR_EL1_DCACHE_DIS (0 << 2) /* Data cache disabled */ macro |
H A D | macro.h | 277 SCTLR_EL1_SA_DIS | SCTLR_EL1_DCACHE_DIS |\ |