Home
last modified time | relevance | path

Searched refs:SCR_RW (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/arm/
H A Dcpu.h1661 #define SCR_RW (1ULL << 10) macro
2615 aa64 = aa64 && (env->cp15.scr_el3 & SCR_RW); in arm_el_is_aa64()
H A Dcpu.c620 env->cp15.scr_el3 |= SCR_RW; in arm_emulate_firmware_reset()
H A Dhelper.c1891 value |= SCR_RW; /* RAO/WI */ in scr_write()
1933 valid_mask &= ~(SCR_RW | SCR_ST); in scr_write()
10786 rw = ((env->cp15.scr_el3 & SCR_RW) == SCR_RW); in arm_phys_excp_target_el()
11584 is_aa64 = (env->cp15.scr_el3 & SCR_RW) != 0; in arm_cpu_do_interrupt_aarch64()