Searched refs:SCL_CSEN (Results 1 – 2 of 2) sorted by relevance
| /openbmc/u-boot/drivers/ddr/microchip/ | ||
| H A D | ddr2_regs.h | 135 #define SCL_CSEN BIT(0) macro |
| H A D | ddr2.c | 42 writel(SCL_CSEN | SCL_WCAS_LAT(WL), &ddr2_phy->scl_config_2); in ddr2_phy_init() |