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Searched refs:SCLK_VDEC_CABAC (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Drk3228-cru.h56 #define SCLK_VDEC_CABAC 133 macro
H A Drk3328-cru.h54 #define SCLK_VDEC_CABAC 65 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3328-cru.h53 #define SCLK_VDEC_CABAC 65 macro
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk322x.dtsi237 <&cru SCLK_VDEC_CABAC>,
642 <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
644 assigned-clocks = <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi313 <&cru SCLK_VDEC_CABAC>,
674 <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;
676 assigned-clocks = <&cru ACLK_RKVDEC>, <&cru SCLK_VDEC_CABAC>,
806 <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c637 case SCLK_VDEC_CABAC: in rk3328_clk_set_rate()
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3228.c293 COMPOSITE(SCLK_VDEC_CABAC, "sclk_vdec_cabac", mux_pll_src_4plls_p, 0,
H A Dclk-rk3328.c514 COMPOSITE(SCLK_VDEC_CABAC, "sclk_vdec_cabac", mux_4plls_p, 0,
/openbmc/u-boot/arch/arm/dts/
H A Drk3328.dtsi374 <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,
386 <&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>,