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Searched refs:SCLK_SPDIF_8CH (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3368-cru.h45 #define SCLK_SPDIF_8CH 83 macro
H A Drk3399-cru.h41 #define SCLK_SPDIF_8CH 85 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3368-cru.h36 #define SCLK_SPDIF_8CH 83 macro
H A Drk3399-cru.h42 #define SCLK_SPDIF_8CH 85 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3368.c386 GATE(SCLK_SPDIF_8CH, "sclk_spdif_8ch", "spdif_8ch_pre", CLK_SET_RATE_PARENT,
H A Dclk-rk3399.c590 GATE(SCLK_SPDIF_8CH, "clk_spdif", "clk_spdif_mux", CLK_SET_RATE_PARENT,
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi787 clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
H A Drk3399.dtsi1699 clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;
/openbmc/u-boot/arch/arm/dts/
H A Drk3399.dtsi1470 clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;