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Searched refs:SCLK_PWM0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dpx30-cru.h36 #define SCLK_PWM0 34 macro
H A Drk3308-cru.h30 #define SCLK_PWM0 26 macro
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3308.dtsi493 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
504 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
515 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
526 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
H A Dpx30.dtsi670 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
681 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
692 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
703 clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>;
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3308.c393 COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_dpll_vpll0_xin24m_p, 0,
H A Dclk-px30.c738 COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_gpll_xin24m_p, 0,