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Searched refs:SCLK_HEVC_CORE (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Drk3128-cru.h52 #define SCLK_HEVC_CORE 134 macro
H A Drv1108-cru.h38 #define SCLK_HEVC_CORE 88 macro
H A Drk3368-cru.h60 #define SCLK_HEVC_CORE 112 macro
H A Drk3288-cru.h67 #define SCLK_HEVC_CORE 112 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3368-cru.h70 #define SCLK_HEVC_CORE 112 macro
H A Drv1108-cru.h38 #define SCLK_HEVC_CORE 88 macro
H A Drk3288-cru.h64 #define SCLK_HEVC_CORE 112 macro
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-rk3128.c262 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_5plls_p, 0,
H A Dclk-rv1108.c237 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_4plls_p, 0,
H A Dclk-rk3368.c718 GATE(SCLK_HEVC_CORE, "sclk_hevc_core", "sclk_hevc_core_src", 0, RK3368_CLKGATE_CON(15), 2, GFLAGS),
H A Dclk-rk3288.c480 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_cpll_gpll_npll_p, 0,
/openbmc/u-boot/arch/arm/dts/
H A Drk3288.dtsi1540 <&cru SCLK_HEVC_CORE>,
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi706 <&cru SCLK_HEVC_CORE>;
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3288.dtsi815 <&cru SCLK_HEVC_CORE>;