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Searched refs:RdV (Results 1 – 15 of 15) sorted by relevance

/openbmc/qemu/target/hexagon/
H A Darch.c244 float32 RsV, RtV, RdV; in arch_sf_recip_common() local
252 RdV = RsV = RtV = float32_nan; in arch_sf_recip_common()
257 RdV = RsV = RtV = float32_nan; in arch_sf_recip_common()
263 RdV = RsV = RtV = float32_nan; in arch_sf_recip_common()
266 RdV = RsV = RtV = float32_nan; in arch_sf_recip_common()
270 RdV = RsV = RtV = float32_nan; in arch_sf_recip_common()
282 RdV = float32_one; in arch_sf_recip_common()
286 RdV = float32_one; in arch_sf_recip_common()
292 RdV = float32_one; in arch_sf_recip_common()
298 RdV = float32_one; in arch_sf_recip_common()
[all …]
H A Dop_helper.c318 float32 RdV; in HELPER() local
325 if (arch_sf_recip_common(&RsV, &RtV, &RdV, &adjust, &env->fp_status)) { in HELPER()
330 RdV = build_float32(extract32(RtV, 31, 1), exp, mant); in HELPER()
333 return ((uint64_t)RdV << 32) | PeV; in HELPER()
339 float32 RdV; in HELPER() local
346 if (arch_sf_invsqrt_common(&RsV, &RdV, &adjust, &env->fp_status)) { in HELPER()
351 RdV = build_float32(extract32(RsV, 31, 1), exp, mant); in HELPER()
354 return ((uint64_t)RdV << 32) | PeV; in HELPER()
611 float32 RdV; in HELPER() local
613 RdV = uint32_to_float32(RsV, &env->fp_status); in HELPER()
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H A Dgen_tcg.h91 fGEN_TCG_LOAD_AP(RdV, 1, u)
93 fGEN_TCG_LOAD_AP(RdV, 1, s)
95 fGEN_TCG_LOAD_AP(RdV, 2, u)
97 fGEN_TCG_LOAD_AP(RdV, 2, s)
99 fGEN_TCG_LOAD_AP(RdV, 4, u)
120 fGEN_TCG_LOAD_pcr(0, fLOAD(1, 1, u, EA, RdV))
122 fGEN_TCG_LOAD_pcr(0, fLOAD(1, 1, s, EA, RdV))
124 fGEN_TCG_LOAD_pcr(1, fLOAD(1, 2, u, EA, RdV))
126 fGEN_TCG_LOAD_pcr(1, fLOAD(1, 2, s, EA, RdV))
128 fGEN_TCG_LOAD_pcr(2, fLOAD(1, 4, u, EA, RdV))
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H A DREADME63 Instruction semantics "{ RdV=RsV+RtV;}"
66 RdV is the destination register
83 TCGv RdV = tcg_temp_new();
87 gen_helper_A2_add(RdV, tcg_env, RsV, RtV);
88 gen_log_reg_write(ctx, RdN, RdV);
95 int32_t RdV = 0;
96 { RdV=RsV+RtV;}
97 return RdV;
115 tcg_gen_add_tl(RdV, RsV, RtV)
123 Instruction semantics "{ fEA_REG(RsV); fLOAD_LOCKED(1,4,u,EA,RdV) }"
H A Dgenptr.c1044 static void gen_asr_r_r_sat(DisasContext *ctx, TCGv RdV, TCGv RsV, TCGv RtV) in gen_asr_r_r_sat() argument
1055 gen_shl_sat(ctx, RdV, RsV, shift_amt); in gen_asr_r_r_sat()
1060 gen_sar(RdV, RsV, shift_amt); in gen_asr_r_r_sat()
1066 static void gen_asl_r_r_sat(DisasContext *ctx, TCGv RdV, TCGv RsV, TCGv RtV) in gen_asl_r_r_sat() argument
1077 gen_sar(RdV, RsV, shift_amt); in gen_asl_r_r_sat()
1082 gen_shl_sat(ctx, RdV, RsV, shift_amt); in gen_asl_r_r_sat()
1137 static void gen_asr_r_svw_trun(DisasContext *ctx, TCGv RdV, in gen_asr_r_svw_trun() argument
1164 tcg_gen_deposit_tl(RdV, RdV, tmp32, i * 16, 16); in gen_asr_r_svw_trun()
1177 tcg_gen_deposit_tl(RdV, RdV, tmp32, i * 16, 16); in gen_asr_r_svw_trun()
1182 tcg_gen_movi_tl(RdV, 0); in gen_asr_r_svw_trun()
/openbmc/qemu/target/hexagon/imported/
H A Dalu.idef29 { RdV=RsV+RtV;})
33 { RdV=RtV-RsV;})
41 COND_ALU(A2_padd,"Rd32=add(Rs32,Rt32)","Conditionally Add 32-bit registers",RdV=RsV+RtV)
42 COND_ALU(A2_psub,"Rd32=sub(Rt32,Rs32)","Conditionally Subtract 32-bit registers",RdV=RtV-RsV)
43 COND_ALU(A2_paddi,"Rd32=add(Rs32,#s8)","Conditionally Add Register and immediate",fIMMEXT(siV); RdV…
44 COND_ALU(A2_pxor,"Rd32=xor(Rs32,Rt32)","Conditionally XOR registers",RdV=RsV^RtV)
45 COND_ALU(A2_pand,"Rd32=and(Rs32,Rt32)","Conditionally AND registers",RdV=RsV&RtV)
46 COND_ALU(A2_por,"Rd32=or(Rs32,Rt32)","Conditionally OR registers",RdV=RsV|RtV)
48 COND_ALU(A4_psxtb,"Rd32=sxtb(Rs32)","Conditionally sign-extend byte", RdV=fSXTN(8,32,RsV))
49 COND_ALU(A4_pzxtb,"Rd32=zxtb(Rs32)","Conditionally zero-extend byte", RdV=fZXTN(8,32,RsV))
[all …]
H A Dshift.idef158 { RdV = fASHIFTR(((fASHIFTR(RsV,uiV,4_8))+1),1,8_8); })
172 RdV = fBIDIR_LSHIFTL(siV,shamt,4_8);
180 { RdV = RtV + fASHIFTL(RsV,uiV,4_4); })
231 fSETBYTE(i,RdV, fGETBYTE(0,RsV));
322 RdV = fSXTN(width,32,(fCAST4_4u(RsV) >> offset));
331 RdV = fZXTN(width,32,(fCAST4_4u(RsV) >> offset));
369 RdV = ((1<<uiV)-1) << UiV;
398 RdV = fSXTN(width,64,fBIDIR_LSHIFTR(fCAST4_8u(RsV),offset,4_8));
408 RdV = fZXTN(width,64,fBIDIR_LSHIFTR(fCAST4_8u(RsV),offset,4_8));
464 RdV = (RsV | (1<<uiV));
[all …]
H A Dsubinsns.idef31 Q6INSN(SA1_tfr, "Rd16=Rs16", ATTRIBS(A_SUBINSN),"Tfr", { RdV=RsV;})
32 Q6INSN(SA1_seti, "Rd16=#u6", ATTRIBS(A_SUBINSN),"Set immed", { fIMMEXT(uiV); RdV=…
33 Q6INSN(SA1_setin1, "Rd16=#-1", ATTRIBS(A_SUBINSN),"Set to -1", { RdV=-1;})
34 … (p0.new) Rd16=#0", ATTRIBS(A_SUBINSN),"clear if true", { if (fLSBNEW0) {RdV=0;} else {CANCEL;} …
35 …p0.new) Rd16=#0", ATTRIBS(A_SUBINSN),"clear if false",{ if (fLSBNEW0NOT) {RdV=0;} else {CANCEL;} …
36 …#0", ATTRIBS(A_SUBINSN),"clear if true", { if (fLSBOLD(fREAD_P0())) {RdV=0;} else {CANCEL;} …
37 …", ATTRIBS(A_SUBINSN),"clear if false",{ if (fLSBOLDNOT(fREAD_P0())) {RdV=0;} else {CANCEL;} …
39 Q6INSN(SA1_addsp, "Rd16=add(r29,#u6:2)", ATTRIBS(A_SUBINSN),"Add", { RdV=fREAD_SP()+uiV…
40 Q6INSN(SA1_inc, "Rd16=add(Rs16,#1)", ATTRIBS(A_SUBINSN),"Inc", { RdV=RsV+1;})
41 Q6INSN(SA1_dec, "Rd16=add(Rs16,#-1)", ATTRIBS(A_SUBINSN),"Dec", { RdV=RsV-1;})
[all …]
H A Dfloat.idef27 { RdV=fUNFLOAT(fFLOAT(RsV)+fFLOAT(RtV));})
31 { RdV=fUNFLOAT(fFLOAT(RsV)-fFLOAT(RtV));})
35 { RdV=fUNFLOAT(fSFMPY(fFLOAT(RsV),fFLOAT(RtV)));})
108 { RdV = fUNFLOAT(fSF_MAX(fFLOAT(RsV),fFLOAT(RtV))); })
112 { RdV = fUNFLOAT(fSF_MIN(fFLOAT(RsV),fFLOAT(RtV))); })
136 RdV = (127 - 6) << 23;
137 RdV += uiV << 17;
143 RdV = (127 - 6) << 23;
144 RdV += (uiV << 17);
145 RdV |= (1 << 31);
[all …]
H A Dcompare.idef62 {fIMMEXT(siV); RdV=(RsV==siV); })
66 {fIMMEXT(siV); RdV=(RsV!=siV); })
71 {RdV=(RsV==RtV); })
75 {RdV=(RsV!=RtV); })
209 { RdV = (PsV&0x55) | (PtV&0xAA); })
215 { RdV = (fLSBOLD(PuV) ? RsV : RtV); })
220 { fIMMEXT(siV); if (fLSBNEW(PuN)) RdV=siV; else CANCEL;})
224 { fIMMEXT(siV); if (fLSBNEWNOT(PuN)) RdV=siV; else CANCEL;})
228 { fIMMEXT(siV); if (fLSBOLD(PuV)) RdV=siV; else CANCEL;})
232 { fIMMEXT(siV); if (fLSBOLDNOT(PuV)) RdV=siV; else CANCEL;})
[all …]
H A Dldst.idef34 …=memub","Load Unsigned Byte",ATTRIBS(A_MEMSIZE_1B,A_LOAD,A_REGWRSIZE_1B),"0",fLOAD(1,1,u,EA,RdV),0)
35 …DES(loadrb, "Rd32=memb", "Load signed Byte",ATTRIBS(A_MEMSIZE_1B,A_LOAD),"0",fLOAD(1,1,s,EA,RdV),0)
36 …"Load unsigned Half integer",ATTRIBS(A_REGWRSIZE_2B,A_MEMSIZE_2B,A_LOAD),"1",fLOAD(1,2,u,EA,RdV),1)
37 …, "Load signed Half integer",ATTRIBS(A_REGWRSIZE_2B,A_MEMSIZE_2B,A_LOAD),"1",fLOAD(1,2,s,EA,RdV),1)
38 …ri, "Rd32=memw", "Load Word",ATTRIBS(A_REGWRSIZE_4B,A_MEMSIZE_4B,A_LOAD),"2",fLOAD(1,4,u,EA,RdV),2)
47 fSETHALF(i,RdV,fGETUBYTE(i,tmpV));
68 fSETHALF(i,RdV,fGETBYTE(i,tmpV));
136 { fEA_REG(RsV); fLOAD(1,4,u,EA,RdV); })
196 { fEA_REG(RsV); fLOAD_LOCKED(1,4,u,EA,RdV) })
241 …Load Unsigned Byte",ATTRIBS(A_ARCHV2,A_MEMSIZE_1B,A_LOAD,A_REGWRSIZE_1B),"0",0,fLOAD(1,1,u,EA,RdV))
[all …]
H A Dmpy.idef40 STD_SP_MODES(mpy, "Rd32=mpy", ,RdV, ,fMPY16SS, ,fPASS,fPASS)
41 STD_SP_MODES(mpy_sat, "Rd32=mpy", ,RdV, ,fMPY16SS,":sat" ,fSAT, fPASS)
42 STD_SP_MODES(mpy_rnd, "Rd32=mpy", ,RdV, ,fMPY16SS,":rnd" ,fPASS,fROUND)
43 STD_SP_MODES(mpy_sat_rnd,"Rd32=mpy", ,RdV, ,fMPY16SS,":rnd:sat",fSAT, fROUND)
65 STD_USP_MODES(mpyu, "Rd32=mpyu", ATTRIBS() ,RdV, ,fMPY16UU, ,fPASS,fPASS)
76 { fIMMEXT(uiV); RdV=RsV*uiV; })
80 { RdV=RsV*-uiV; })
106 Q6INSN(M2_mpy_up, "Rd32=mpy(Rs32,Rt32)", ATTRIBS(),"Multiply 32x32",{RdV=fMPY32SS(RsV,RtV)>>…
107 Q6INSN(M2_mpy_up_s1, "Rd32=mpy(Rs32,Rt32):<<1", ATTRIBS(),"Multiply 32x32",{RdV=fMPY32SS(RsV,Rt…
108 Q6INSN(M2_mpy_up_s1_sat, "Rd32=mpy(Rs32,Rt32):<<1:sat", ATTRIBS(),"Multiply 32x32",{RdV=fSAT(fMPY32…
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H A Dbranch.idef132 {fIMMEXT(riV); fPCALIGN(riV); RdV=UiV; fBRANCH(fREAD_PC()+riV,COF_TYPE_JUMP);})
135 {fIMMEXT(riV); fPCALIGN(riV); RdV=RsV; fBRANCH(fREAD_PC()+riV,COF_TYPE_JUMP);})
/openbmc/qemu/target/hexagon/idef-parser/
H A DREADME.rst18 A2_add(RdV, in RsV, in RtV) {
19 { RdV=RsV+RtV;}
27 void emit_A2_add(DisasContext *ctx, Insn *insn, Packet *pkt, TCGv_i32 RdV,
29 /* { RdV=RsV+RtV;} */
33 tcg_gen_mov_i32(RdV, tmp_0);
66 { RdV=RsV+RtV;}
77 will be declared, ``RsV`` and ``RtV`` will also be read and ``RdV`` will be
98 tcg_gen_mov_i32(RdV, tmp_0);
249 to simplify parsing. For instance, variable names such as ``RdV``, ``RssV``,
513 void emit_A2_add(DisasContext *ctx, Insn *insn, Packet *pkt, TCGv_i32 RdV,
[all …]
/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dext.idef2037 RdV = VuV.uw[ (RsV & (fVBYTES()-1)) >> 2];
2038 fHIDE(warn("RdV=0x%08x",RdV);))