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Searched refs:RVU_PF_VFFLR_INT_ENA_W1CX (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/crypto/marvell/octeontx2/
H A Dotx2_cptpf_main.c107 RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(num_vfs)); in cptpf_disable_vf_flr_me_intrs()
121 RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(num_vfs - 64)); in cptpf_disable_vf_flr_me_intrs()
199 RVU_PF_VFFLR_INT_ENA_W1CX(reg), in cptpf_vf_flr_intr()
/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/nic/
H A Dotx2_reg.h29 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
H A Dotx2_pf.c88 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in otx2_disable_flr_me_intr()
99 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in otx2_disable_flr_me_intr()
167 otx2_write64(pf, RVU_PF_VFFLR_INT_ENA_W1CX(reg), in otx2_pf_flr_intr_handler()
/openbmc/linux/drivers/net/ethernet/marvell/octeontx2/af/
H A Drvu_reg.h95 #define RVU_PF_VFFLR_INT_ENA_W1CX(a) (0x960 | (a) << 3) macro
H A Drvu.c2724 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(reg), BIT_ULL(vf)); in rvu_afvf_queue_flr_work()
3099 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(0), INTR_MASK(vfs)); in rvu_disable_afvf_intr()
3106 rvupf_write64(rvu, RVU_PF_VFFLR_INT_ENA_W1CX(1), INTR_MASK(vfs - 64)); in rvu_disable_afvf_intr()