Searched refs:RTSR_HZ (Results 1 – 6 of 6) sorted by relevance
36 #define RTSR_HZ BIT(1) /* HZ rising-edge detected */ macro64 writel_relaxed((RTSR_AL | RTSR_HZ) & (rtsr >> 2), info->rtsr); in sa1100_rtc_interrupt()73 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr); in sa1100_rtc_interrupt()84 if (rtsr & RTSR_HZ) in sa1100_rtc_interrupt()236 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr); in sa1100_rtc_init()
40 #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ macro42 #define RTSR_TRIG_MASK (RTSR_AL | RTSR_HZ | RTSR_RDAL1 | RTSR_RDAL2\151 if (rtsr & RTSR_HZ) in pxa_rtc_irq()
21 #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ macro
241 #define RTSR_HZ (1 << 1) /* RTC 1Hz detected */ macro270 qemu_set_irq(s->rtc_hz_irq, s->rtsr & RTSR_HZ); in strongarm_rtc_int_update()283 if ((s->rtsr & RTSR_HZE) && !(s->rtsr & RTSR_HZ)) { in strongarm_rtc_timer_update()309 s->rtsr |= RTSR_HZ; in strongarm_rtc_hz_tick()354 (s->rtsr & ~(value & (RTSR_AL | RTSR_HZ))); in strongarm_rtc_write()
912 #define RTSR_HZ (1 << 1) /* HZ rising-edge detected */ macro
1200 #define RTSR_HZ 0x00000002 /* 1 Hz clock detected */ macro