Searched refs:RTSR_AL (Results 1 – 6 of 6) sorted by relevance
37 #define RTSR_AL BIT(0) /* RTC alarm detected */ macro64 writel_relaxed((RTSR_AL | RTSR_HZ) & (rtsr >> 2), info->rtsr); in sa1100_rtc_interrupt()73 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr); in sa1100_rtc_interrupt()77 if (rtsr & RTSR_AL) in sa1100_rtc_interrupt()82 if (rtsr & RTSR_AL) in sa1100_rtc_interrupt()134 alrm->pending = (rtsr & RTSR_AL) ? 1 : 0; in sa1100_rtc_read_alarm()144 (RTSR_HZE | RTSR_ALE | RTSR_AL), info->rtsr); in sa1100_rtc_set_alarm()236 writel_relaxed(RTSR_AL | RTSR_HZ, info->rtsr); in sa1100_rtc_init()
41 #define RTSR_AL (1 << 0) /* RTC alarm detected */ macro42 #define RTSR_TRIG_MASK (RTSR_AL | RTSR_HZ | RTSR_RDAL1 | RTSR_RDAL2\
22 #define RTSR_AL (1 << 0) /* RTC alarm detected */ macro
240 #define RTSR_AL (1 << 0) /* RTC Alarm detected */ macro269 qemu_set_irq(s->rtc_irq, s->rtsr & RTSR_AL); in strongarm_rtc_int_update()289 if ((s->rtsr & RTSR_ALE) && !(s->rtsr & RTSR_AL)) { in strongarm_rtc_timer_update()301 s->rtsr |= RTSR_AL; in strongarm_rtc_alarm_tick()354 (s->rtsr & ~(value & (RTSR_AL | RTSR_HZ))); in strongarm_rtc_write()
913 #define RTSR_AL (1 << 0) /* RTC alarm detected */ macro
1199 #define RTSR_AL 0x00000001 /* ALarm detected */ macro