/openbmc/linux/arch/sparc/crypto/ |
H A D | opcodes.h | 12 #define RS2(x) (FPD_ENCODE(x) << 0) macro 19 .word (F3F(2,0x36,0x147)|RS1(a)|RS2(b)|RD(c)); 31 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 33 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 35 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 37 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 39 .word (F3F(2, 0x19, 4)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 41 .word (F3F(2, 0x19, 5)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 43 .word (F3F(2, 0x19, 6)|RS1(a)|RS2(b)|RS3(c)|RD(d)); 45 .word (F3F(2, 0x19, 7)|RS1(a)|RS2(b)|RS3(c)|RD(d)); [all …]
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/openbmc/linux/arch/sparc/kernel/ |
H A D | visemul.c | 137 #define RS2(INSN) (((INSN) >> 0) & 0x1f) macro 299 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in edge() 301 orig_rs2 = rs2 = fetch_reg(RS2(insn), regs); in edge() 377 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in array() 379 rs2 = fetch_reg(RS2(insn), regs); in array() 410 maybe_flush_windows(RS1(insn), RS2(insn), RD(insn), 0); in bmask() 412 rs2 = fetch_reg(RS2(insn), regs); in bmask() 431 rs2 = fpd_regval(f, RS2(insn)); in bshuffle() 455 rs2 = fpd_regval(f, RS2(insn)); in pdist() 488 rs2 = fpd_regval(f, RS2(insn)); in pformat() [all …]
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/openbmc/linux/arch/riscv/include/asm/ |
H A D | insn-def.h | 140 __RD(0), RS1(vaddr), RS2(asid)) 144 __RD(0), RS1(gaddr), RS2(vmid)) 165 __RD(0), RS1(vaddr), RS2(asid)) 177 __RD(0), RS1(vaddr), RS2(asid)) 181 __RD(0), RS1(gaddr), RS2(vmid))
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/openbmc/linux/arch/sparc/net/ |
H A D | bpf_jit_comp_64.c | 56 #define RS2(X) ((X)) macro 263 emit(OR | RS1(G0) | RS2(from) | RD(to), ctx); in emit_reg_move() 290 emit(opcode | RS1(dst) | RS2(src) | RD(dst), ctx); in emit_alu() 295 emit(opcode | RS1(a) | RS2(b) | RD(c), ctx); in emit_alu3() 313 emit(insn | RS2(tmp), ctx); in emit_alu_K() 332 emit(insn | RS2(tmp), ctx); in emit_alu3_K() 613 emit(OR | RS1(dest) | RS2(tmp) | RD(dest), ctx); in emit_loadimm64() 632 emit(cb_opc | WDISP10(off << 2) | RS1(dst) | RS2(src), ctx); in emit_cbcond() 647 emit(SUBCC | RS1(R1) | RS2(R2) | RD(G0), CTX) 653 emit(ANDCC | RS1(R1) | RS2(R2) | RD(G0), CTX) [all …]
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H A D | bpf_jit_comp_32.c | 27 #define RS2(X) ((X)) macro 113 *prog++ = SUB | RS1(G0) | RS2(r_A) | RD(r_A); \ 118 *prog++ = OR | RS1(G0) | RS2(FROM) | RD(TO); \ 123 *prog++ = OR | RS1(G0) | RS2(G0) | RD(REG); \ 140 *prog++ = OPCODE | RS1(r_A) | RS2(r_X) | RD(r_A); \ 166 *prog++ = _insn | RS2(r_TMP); \ 262 *prog++ = (SUBCC | RS1(R1) | RS2(R2) | RD(G0)) 268 *prog++ = (ANDCC | RS1(R1) | RS2(R2) | RD(G0)) 274 *prog++ = (SUB | RS1(R1) | RS2(R2) | RD(R3)) 280 *prog++ = (ADD | RS1(R1) | RS2(R2) | RD(R3)) [all …]
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/openbmc/qemu/target/riscv/ |
H A D | crypto_helper.c | 130 uint64_t RS2 = rs2; in HELPER() local 132 uint32_t rs2_lo = RS2; in HELPER() 133 uint32_t rs2_hi = RS2 >> 32; in HELPER()
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/openbmc/qemu/tests/tcg/tricore/asm/ |
H A D | test_dvstep.S | 5 # Result RS1 RS2
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/openbmc/qemu/disas/ |
H A D | sparc.c | 197 #define RS2(x) ((x) & 0x1f) /* Rs2 field. */ macro 210 #define RS2_G0 RS2 (~0) 638 { "sta", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", 0, v6 }, /* sta d,[rs1+%g… 645 { "sta", F3(3, 0x34, 0), F3(~3, ~0x34, ~0)|RS2(~0), "g,[1]A", 0, v9 }, /* sta d,[rs1+%g… 652 { "stwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* sta d,[… 658 { "stswa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* sta d,[… 664 { "stuwa", F3(3, 0x14, 0), F3(~3, ~0x14, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v9 }, /* sta d,[… 691 { "stba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", 0, v6 }, /* stba d,[rs1+%… 698 { "stsba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v6 }, /* stba d,… 704 { "stuba", F3(3, 0x15, 0), F3(~3, ~0x15, ~0)|RS2(~0), "d,[1]A", F_ALIAS, v6 }, /* stba d,… [all …]
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