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Searched refs:RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c1333 data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK; in gfx_v9_4_3_update_spm_vmid()
1334 data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT; in gfx_v9_4_3_update_spm_vmid()
H A Dgfx_v11_0.c4970 data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK; in gfx_v11_0_update_spm_vmid()
4971 data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT; in gfx_v11_0_update_spm_vmid()
H A Dgfx_v9_0.c4897 data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK; in gfx_v9_0_update_spm_vmid_internal()
4898 data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT; in gfx_v9_0_update_spm_vmid_internal()
H A Dgfx_v10_0.c7900 data &= ~RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK; in gfx_v10_0_update_spm_vmid_internal()
7901 data |= (vmid & RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK) << RLC_SPM_MC_CNTL__RLC_SPM_VMID__SHIFT; in gfx_v10_0_update_spm_vmid_internal()
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h23365 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_9_1_sh_mask.h24656 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_9_2_1_sh_mask.h24720 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_9_4_3_sh_mask.h26979 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_9_4_2_sh_mask.h22164 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_11_0_0_sh_mask.h36880 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_10_1_0_sh_mask.h33789 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_11_0_3_sh_mask.h40252 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro
H A Dgc_10_3_0_sh_mask.h32797 #define RLC_SPM_MC_CNTL__RLC_SPM_VMID_MASK … macro