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Searched refs:RLC_RLCS_SMU_GFXCLK_CONTROL__SMU_GFXCLK_DIVIDER_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h34692 #define RLC_RLCS_SMU_GFXCLK_CONTROL__SMU_GFXCLK_DIVIDER_MASK … macro
H A Dgc_10_3_0_sh_mask.h33922 #define RLC_RLCS_SMU_GFXCLK_CONTROL__SMU_GFXCLK_DIVIDER_MASK … macro