Searched refs:RK3288_LVDS_CH0_REG2_PLL_FBDIV8 (Results 1 – 2 of 2) sorted by relevance
35 #define RK3288_LVDS_CH0_REG2_PLL_FBDIV8 BIT(0) macro73 (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)
38 #define RK3288_LVDS_CH0_REG2_PLL_FBDIV8 BIT(0) macro80 (_fbd & BIT(8) ? RK3288_LVDS_CH0_REG2_PLL_FBDIV8 : 0)