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Searched refs:RISCV_IOMMU_PQCSR_PQON (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/tests/qtest/libqos/
H A Driscv-iommu.h60 #define RISCV_IOMMU_PQCSR_PQON RISCV_IOMMU_QUEUE_ACTIVE macro
/openbmc/qemu/tests/qtest/
H A Driscv-iommu-test.c79 g_assert_cmpuint(reg & RISCV_IOMMU_PQCSR_PQON, ==, 0); in test_reg_reset()
/openbmc/qemu/hw/riscv/
H A Driscv-iommu-bits.h171 #define RISCV_IOMMU_PQCSR_PQON RISCV_IOMMU_QUEUE_ACTIVE macro
H A Driscv-iommu.c162 if (!(ctrl & RISCV_IOMMU_PQCSR_PQON) || in riscv_iommu_pri()
1760 bool active = !!(ctrl_set & RISCV_IOMMU_PQCSR_PQON); in riscv_iommu_process_pq_control()
1769 ctrl_set = RISCV_IOMMU_PQCSR_PQON; in riscv_iommu_process_pq_control()
1775 ctrl_clr = RISCV_IOMMU_PQCSR_BUSY | RISCV_IOMMU_PQCSR_PQON; in riscv_iommu_process_pq_control()
2189 stl_le_p(&s->regs_ro[RISCV_IOMMU_REG_PQCSR], RISCV_IOMMU_PQCSR_PQON | in riscv_iommu_realize()