Home
last modified time | relevance | path

Searched refs:RING_MI_MODE (Results 1 – 14 of 14) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gvt/
H A Dmmio_context.c74 {BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
128 {BCS0, RING_MI_MODE(BLT_RING_BASE), 0xffff, false}, /* 0x2209c */
H A Dhandlers.c2231 MMIO_RING_DFH(RING_MI_MODE, D_ALL, F_MODE_MASK | F_CMD_ACCESS, in init_generic_mmio_info()
/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_ring_submission.c122 if ((ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE) == 0) in flush_cs_tlb()
249 RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in xcs_resume()
1058 (ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE) == 0); in ring_release()
H A Dintel_engine_cs.c1633 const i915_reg_t mode = RING_MI_MODE(engine->mmio_base); in __intel_engine_stop_cs()
1700 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in intel_engine_cancel_stop_cs()
1861 !(ENGINE_READ(engine, RING_MI_MODE) & MODE_IDLE)) in ring_is_idle()
2105 ENGINE_READ(engine, RING_MI_MODE), in intel_engine_print_registers()
2106 ENGINE_READ(engine, RING_MI_MODE) & (MODE_IDLE) ? " [idle]" : ""); in intel_engine_print_registers()
H A Dintel_engine_regs.h73 #define RING_MI_MODE(base) _MMIO((base) + 0x9c) macro
H A Dintel_workarounds.c358 wa_masked_en(wal, RING_MI_MODE(RENDER_RING_BASE), ASYNC_FLIP_PERF_DISABLE); in gen8_ctx_workarounds_init()
859 wa_masked_dis(wal, RING_MI_MODE(engine->mmio_base), TGL_NESTED_BB_EN); in fakewa_disable_nestedbb_mode()
2691 RING_MI_MODE(RENDER_RING_BASE), in rcs_engine_wa_init()
2750 wa_add(wal, RING_MI_MODE(RENDER_RING_BASE), in rcs_engine_wa_init()
H A Dselftest_lrc.c324 i915_mmio_reg_offset(RING_MI_MODE(engine->mmio_base)), in live_lrc_fixed()
H A Dintel_execlists_submission.c1980 ENGINE_READ(engine, RING_MI_MODE)); in process_csb()
2945 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in enable_execlists()
/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_pmu.c377 val = ENGINE_READ_FW(engine, RING_MI_MODE); in engine_sample()
H A Dintel_gvt_mmio_table.c87 MMIO_RING_D(RING_MI_MODE); in iterate_generic_mmio()
H A Dintel_uncore.c1899 __raw_uncore_write32(uncore, RING_MI_MODE(RENDER_RING_BASE), 0); in ilk_dummy_write()
H A Di915_gpu_error.c1288 ee->mode = ENGINE_READ(engine, RING_MI_MODE); in engine_record_registers()
/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_capture.c70 { RING_MI_MODE(0), 0, 0, "MODE" }, \
H A Dintel_guc_submission.c4186 ENGINE_WRITE_FW(engine, RING_MI_MODE, _MASKED_BIT_DISABLE(STOP_RING)); in start_engine()
4187 ENGINE_POSTING_READ(engine, RING_MI_MODE); in start_engine()