Searched refs:RING_HWS_PGA (Results 1 – 9 of 9) sorted by relevance
/openbmc/linux/drivers/gpu/drm/i915/gt/ |
H A D | intel_engine_regs.h | 66 #define RING_HWS_PGA(base) _MMIO((base) + 0x80) macro
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H A D | intel_ring_submission.c | 109 hwsp = RING_HWS_PGA(engine->mmio_base); in set_hwsp()
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H A D | intel_execlists_submission.c | 2948 RING_HWS_PGA, in enable_execlists() 2950 ENGINE_POSTING_READ(engine, RING_HWS_PGA); in enable_execlists()
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/openbmc/linux/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_guc_ads.c | 373 ret |= GUC_MMIO_REG_ADD(gt, regset, RING_HWS_PGA(base), false); in guc_mmio_regset_init()
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H A D | intel_guc_capture.c | 72 { RING_HWS_PGA(0), 0, 0, "HWS" }, \
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H A D | intel_guc_submission.c | 4176 RING_HWS_PGA, in setup_hwsp()
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/openbmc/linux/drivers/gpu/drm/i915/ |
H A D | intel_gvt_mmio_table.c | 813 MMIO_RING_D(RING_HWS_PGA); in iterate_bdw_plus_mmio()
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H A D | i915_gpu_error.c | 1315 mmio = RING_HWS_PGA(engine->mmio_base); in engine_record_registers()
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/openbmc/linux/drivers/gpu/drm/i915/gvt/ |
H A D | handlers.c | 2534 MMIO_RING_GM(RING_HWS_PGA, D_BDW_PLUS, NULL, hws_pga_write); in init_bdw_mmio_info()
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