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Searched refs:REG_SD_DSBD (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/hw/sd/
H A Dallwinner-sdhost.c69 REG_SD_DSBD = 0x10C, /* eMMC DDR Start Bit Detection Control */ enumerator
561 case REG_SD_DSBD: /* eMMC DDR Start Bit Detection Control */ in allwinner_sdhost_read()
726 case REG_SD_DSBD: /* eMMC DDR Start Bit Detection Control */ in allwinner_sdhost_write()