Searched refs:REG_MCMDR (Results 1 – 3 of 3) sorted by relevance
| /openbmc/qemu/hw/net/ |
| H A D | npcm7xx_emc.c | 140 uint32_t mcmdr = emc->regs[REG_MCMDR]; in emc_soft_reset()
142 emc->regs[REG_MCMDR] = mcmdr & (REG_MCMDR_LBK | REG_MCMDR_OPMOD); in emc_soft_reset()
542 if (emc->regs[REG_MCMDR] & REG_MCMDR_ALP) { in emc_receive()
570 if (!(emc->regs[REG_MCMDR] & REG_MCMDR_SPCRC)) { in emc_receive()
581 (!(emc->regs[REG_MCMDR] & REG_MCMDR_SPCRC) && in emc_receive()
597 if (!(emc->regs[REG_MCMDR] & REG_MCMDR_SPCRC)) { in emc_receive()
691 case REG_MCMDR: { in npcm7xx_emc_write()
751 if (emc->regs[REG_MCMDR] & REG_MCMDR_TXON) { in npcm7xx_emc_write()
760 if (emc->regs[REG_MCMDR] & REG_MCMDR_RXON) { in npcm7xx_emc_write()
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| /openbmc/qemu/tests/qtest/ |
| H A D | npcm7xx_emc-test.c | 60 REG_MCMDR, enumerator
308 emc_write(qts, mod, REG_MCMDR, REG_MCMDR_SWR); in emc_soft_reset()
324 val = emc_read(qts, mod, REG_MCMDR); in emc_soft_reset()
357 CHECK_REG(REG_MCMDR, 0); in test_init()
489 uint32_t mcmdr = emc_read(qts, mod, REG_MCMDR); in enable_tx()
491 emc_write(qts, mod, REG_MCMDR, mcmdr); in enable_tx()
640 uint32_t mcmdr = emc_read(qts, mod, REG_MCMDR); in enable_rx()
642 emc_write(qts, mod, REG_MCMDR, mcmdr); in enable_rx()
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| /openbmc/qemu/include/hw/net/ |
| H A D | npcm7xx_emc.h | 37 REG_MCMDR, enumerator
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