Searched refs:REG_HDMI_PHY_QSERDES_COM_HSCLK_SEL (Results 1 – 2 of 2) sorted by relevance
1220 #define REG_HDMI_PHY_QSERDES_COM_HSCLK_SEL 0x00000178 macro
459 hdmi_pll_write(pll, REG_HDMI_PHY_QSERDES_COM_HSCLK_SEL, in hdmi_8996_pll_set_clk_rate()