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Searched refs:RCC_MP_AHB4ENSETR (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/board/st/stm32mp1/
H A Dboard.c19 #define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28) in board_debug_uart_init() macro
26 writel(BIT(6), RCC_MP_AHB4ENSETR); in board_debug_uart_init()
/openbmc/u-boot/drivers/clk/
H A Dclk_stm32mp1.c108 #define RCC_MP_AHB4ENSETR 0xA28 macro
542 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 0, GPIOA, _UNKNOWN_SEL),
543 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 1, GPIOB, _UNKNOWN_SEL),
544 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 2, GPIOC, _UNKNOWN_SEL),
545 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 3, GPIOD, _UNKNOWN_SEL),
546 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 4, GPIOE, _UNKNOWN_SEL),
547 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 5, GPIOF, _UNKNOWN_SEL),
548 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 6, GPIOG, _UNKNOWN_SEL),
549 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 7, GPIOH, _UNKNOWN_SEL),
550 STM32MP1_CLK_SET_CLR(RCC_MP_AHB4ENSETR, 8, GPIOI, _UNKNOWN_SEL),
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/openbmc/linux/drivers/clk/stm32/
H A Dstm32mp13_rcc.h145 #define RCC_MP_AHB4ENSETR 0x760 macro
H A Dclk-stm32mp13.c233 CFG_GATE_SETCLR(GATE_TSC, RCC_MP_AHB4ENSETR, 15),