Home
last modified time | relevance | path

Searched refs:R300_PPLL_REF_DIV_ACC_MASK (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/drivers/video/
H A Dati_radeon_fb.c249 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { in radeon_write_pll_regs()
258 ~R300_PPLL_REF_DIV_ACC_MASK); in radeon_write_pll_regs()
/openbmc/linux/drivers/gpu/drm/radeon/
H A Dradeon_legacy_crtc.c967 if (pll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { in radeon_set_pll()
978 ~R300_PPLL_REF_DIV_ACC_MASK); in radeon_set_pll()
H A Dradeon_clocks.c203 (tmp & R300_PPLL_REF_DIV_ACC_MASK) >> R300_PPLL_REF_DIV_ACC_SHIFT; in radeon_get_clock_info()
H A Dradeon_reg.h1527 # define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) macro
/openbmc/u-boot/include/
H A Dradeon.h995 #define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) macro
/openbmc/linux/include/video/
H A Dradeon.h999 #define R300_PPLL_REF_DIV_ACC_MASK (0x3ff << 18) macro
/openbmc/linux/drivers/video/fbdev/aty/
H A Dradeon_base.c1397 if (mode->ppll_ref_div & R300_PPLL_REF_DIV_ACC_MASK) { in radeon_write_pll_regs()
1406 ~R300_PPLL_REF_DIV_ACC_MASK); in radeon_write_pll_regs()