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Searched refs:PWR_CLK_DIS_BIT (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/power/domain/
H A Dmtk-power-domain.c40 #define PWR_CLK_DIS_BIT BIT(4) macro
232 val &= ~PWR_CLK_DIS_BIT; in scpsys_power_on()
289 val |= PWR_CLK_DIS_BIT; in scpsys_power_off()
/openbmc/linux/drivers/pmdomain/mediatek/
H A Dmtk-pm-domains.c35 #define PWR_CLK_DIS_BIT BIT(4) macro
236 regmap_clear_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); in scpsys_power_on()
288 regmap_set_bits(scpsys->base, pd->data->ctl_offs, PWR_CLK_DIS_BIT); in scpsys_power_off()
H A Dmtk-scpsys.c58 #define PWR_CLK_DIS_BIT BIT(4) macro
332 val &= ~PWR_CLK_DIS_BIT; in scpsys_power_on()
385 val |= PWR_CLK_DIS_BIT; in scpsys_power_off()