Searched refs:PVR5_DCACHE_WRITEBACK_MASK (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/target/microblaze/ | ||
H A D | cpu.h | 187 #define PVR5_DCACHE_WRITEBACK_MASK 0x00004000 macro |
H A D | cpu.c | 301 cpu->cfg.dcache_writeback ? PVR5_DCACHE_WRITEBACK_MASK : 0; in mb_cpu_realizefn() |