Home
last modified time | relevance | path

Searched refs:POWER_AND_PLL_CTRL_REG_40MHZ_VAL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-mvebu/serdes/a38x/
H A Dsys_env_lib.h99 #define POWER_AND_PLL_CTRL_REG_40MHZ_VAL 0x3 macro
H A Dhigh_speed_env_spec.c2060 data1 = POWER_AND_PLL_CTRL_REG_40MHZ_VAL; in hws_ref_clock_set()
2081 data1 = POWER_AND_PLL_CTRL_REG_40MHZ_VAL; in hws_ref_clock_set()
2096 data1 = POWER_AND_PLL_CTRL_REG_40MHZ_VAL; in hws_ref_clock_set()