| /openbmc/qemu/include/hw/misc/ |
| H A D | xlnx-zynqmp-crf.h | 89 REG32(PLL_STATUS, 0x44)
90 FIELD(PLL_STATUS, VPLL_STABLE, 5, 1)
91 FIELD(PLL_STATUS, DPLL_STABLE, 4, 1)
92 FIELD(PLL_STATUS, APLL_STABLE, 3, 1)
93 FIELD(PLL_STATUS, VPLL_LOCK, 2, 1)
94 FIELD(PLL_STATUS, DPLL_LOCK, 1, 1)
95 FIELD(PLL_STATUS, APLL_LOCK, 0, 1)
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| H A D | xlnx-versal-crl.h | 52 REG32(PLL_STATUS, 0x50)
53 FIELD(PLL_STATUS, RPLL_STABLE, 2, 1)
54 FIELD(PLL_STATUS, RPLL_LOCK, 0, 1)
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| /openbmc/u-boot/arch/arm/mach-omap2/ |
| H A D | pipe3-phy.c | 18 #define PLL_STATUS 0x00000004 macro
92 val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in omap_pipe3_wait_lock()
177 val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in phy_pipe3_power_on()
217 val = omap_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in phy_pipe3_power_off()
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| /openbmc/linux/drivers/video/fbdev/omap2/omapfb/dss/ |
| H A D | pll.c | 19 #define PLL_STATUS 0x0004 macro
218 if (wait_for_bit_change(base + PLL_STATUS, 0, 1) != 1) in dss_pll_wait_reset_done()
229 u32 v = readl_relaxed(pll->base + PLL_STATUS); in dss_wait_hsdiv_ack()
301 if (wait_for_bit_change(base + PLL_STATUS, 1, 1) != 1) { in dss_pll_write_config_type_a()
372 if (wait_for_bit_change(base + PLL_STATUS, 1, 1) != 1) { in dss_pll_write_config_type_b()
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| H A D | dsi.c | 1200 DSI_FLD_GET(PLL_STATUS, 0, 0), in _dsi_print_reset_status()
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| /openbmc/linux/drivers/gpu/drm/omapdrm/dss/ |
| H A D | pll.c | 19 #define PLL_STATUS 0x0004 macro
360 if (wait_for_bit_change(base + PLL_STATUS, 0, 1) != 1) in dss_pll_wait_reset_done()
371 u32 v = readl_relaxed(pll->base + PLL_STATUS); in dss_wait_hsdiv_ack()
472 l = readl_relaxed(base + PLL_STATUS); in dss_pll_write_config_type_a()
494 if (wait_for_bit_change(base + PLL_STATUS, 1, 1) != 1) { in dss_pll_write_config_type_a()
566 if (wait_for_bit_change(base + PLL_STATUS, 1, 1) != 1) { in dss_pll_write_config_type_b()
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| H A D | dsi.c | 748 DSI_FLD_GET(PLL_STATUS, 0, 0), in _dsi_print_reset_status()
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| /openbmc/u-boot/drivers/phy/ |
| H A D | ti-pipe3-phy.c | 17 #define PLL_STATUS 0x00000004 macro
114 val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_STATUS); in omap_pipe3_wait_lock()
200 val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_STATUS); in pipe3_init()
257 val = omap_pipe3_readl(pipe3->pll_ctrl_base, PLL_STATUS); in pipe3_exit()
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| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-fracn-gppll.c | 39 #define PLL_STATUS 0xF0 macro
220 return readl_poll_timeout(pll->base + PLL_STATUS, val, in clk_fracn_gppll_wait_lock()
279 ana_mfn = readl_relaxed(pll->base + PLL_STATUS); in clk_fracn_gppll_set_rate()
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| /openbmc/u-boot/drivers/usb/dwc3/ |
| H A D | ti_usb_phy.c | 29 #define PLL_STATUS 0x00000004 macro
137 val = ti_usb3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_usb3_dpll_wait_lock()
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| /openbmc/linux/drivers/phy/ti/ |
| H A D | phy-ti-pipe3.c | 24 #define PLL_STATUS 0x00000004 macro
394 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_pipe3_dpll_wait_lock()
529 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_pipe3_init()
568 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); in ti_pipe3_exit()
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| /openbmc/linux/arch/mips/ar7/ |
| H A D | clock.c | 57 #define PLL_STATUS 0x00000001 macro
233 while (readl(&clock->pll) & PLL_STATUS) in tnetd7300_set_clock()
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| /openbmc/linux/drivers/clk/pistachio/ |
| H A D | clk-pll.c | 16 #define PLL_STATUS 0x0 macro
90 while (!(pll_readl(pll, PLL_STATUS) & PLL_STATUS_LOCK)) in pll_lock()
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| /openbmc/qemu/hw/misc/ |
| H A D | zynq_slcr.c | 58 REG32(PLL_STATUS, 0x10c)
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| /openbmc/linux/drivers/clk/qcom/ |
| H A D | clk-alpha-pll.c | 60 #define PLL_STATUS(p) ((p)->offset + (p)->regs[PLL_OFF_STATUS]) macro
1633 regmap_read(pll->clkr.regmap, PLL_STATUS(pll), &val); in __alpha_pll_trion_prepare()
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