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Searched refs:PLL_MODE_SLOW (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3368.h75 PLL_MODE_SLOW = 0, enumerator
/openbmc/linux/drivers/clk/rockchip/
H A Dclk-pll.c21 #define PLL_MODE_SLOW 0x0 macro
209 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3036_pll_set_params()
442 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3066_pll_set_params()
691 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3399_pll_set_params()
939 pll_mux_ops->set_parent(&pll_mux->hw, PLL_MODE_SLOW); in rockchip_rk3588_pll_set_params()
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3328.c76 PLL_MODE_SLOW = 0, enumerator
256 rk_clrsetreg(&cru->mode_con, mode_mask, PLL_MODE_SLOW << mode_shift); in rkclk_set_pll()
H A Dclk_rk3399.c91 PLL_MODE_SLOW = 0, enumerator
333 PLL_MODE_SLOW << PLL_MODE_SHIFT); in rkclk_set_pll()
H A Dclk_rk3368.c71 case PLL_MODE_SLOW: in rkclk_pll_get_rate()