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Searched refs:PLL_MODE_SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/clk/spear/
H A Dclk-vco-pll.c46 #define PLL_MODE_SHIFT 3 macro
199 mode = (readl_relaxed(vco->mode_reg) >> PLL_MODE_SHIFT) & PLL_MODE_MASK; in clk_vco_recalc_rate()
242 val &= ~(PLL_MODE_MASK << PLL_MODE_SHIFT); in clk_vco_set_rate()
243 val |= (rtbl[i].mode & PLL_MODE_MASK) << PLL_MODE_SHIFT; in clk_vco_set_rate()
/openbmc/linux/include/linux/mfd/
H A Didt82p33_reg.h54 #define PLL_MODE_SHIFT (0) macro
H A Didt8a340_reg.h514 #define PLL_MODE_SHIFT (3) macro
/openbmc/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dcru_rk3368.h73 PLL_MODE_SHIFT = 8, enumerator
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3399.c89 PLL_MODE_SHIFT = 8, enumerator
90 PLL_MODE_MASK = 3 << PLL_MODE_SHIFT,
333 PLL_MODE_SLOW << PLL_MODE_SHIFT); in rkclk_set_pll()
354 PLL_MODE_NORM << PLL_MODE_SHIFT); in rkclk_set_pll()
H A Dclk_rk3368.c70 switch ((con & PLL_MODE_MASK) >> PLL_MODE_SHIFT) { in rkclk_pll_get_rate()
123 PLL_MODE_NORMAL << PLL_MODE_SHIFT); in rkclk_set_pll()
/openbmc/linux/drivers/ptp/
H A Dptp_idt82p33.c114 dpll_mode &= ~(PLL_MODE_MASK << PLL_MODE_SHIFT); in idt82p33_dpll_set_mode()
116 dpll_mode |= (mode << PLL_MODE_SHIFT); in idt82p33_dpll_set_mode()
H A Dptp_clockmatrix.c1387 *mode = (dpll_mode >> PLL_MODE_SHIFT) & PLL_MODE_MASK; in idtcm_get_pll_mode()
1405 dpll_mode &= ~(PLL_MODE_MASK << PLL_MODE_SHIFT); in idtcm_set_pll_mode()
1407 dpll_mode |= (mode << PLL_MODE_SHIFT); in idtcm_set_pll_mode()