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Searched refs:PLL_LOCKED (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init_exynos5.c824 while ((readl(&clk->apll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
840 while ((readl(&clk->kpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
850 while ((readl(&clk->mpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
857 while ((readl(&clk->dpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
865 while ((readl(&clk->epll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
872 while ((readl(&clk->cpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
879 while ((readl(&clk->ipll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
886 while ((readl(&clk->vpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
893 while ((readl(&clk->bpll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
900 while ((readl(&clk->spll_con0) & PLL_LOCKED) == 0) in exynos5420_system_clock_init()
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H A Dexynos5_setup.h157 #define PLL_LOCKED (1 << 29) macro
/openbmc/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qusb2.c35 #define PLL_LOCKED BIT(5) macro
306 .mask_core_ready = PLL_LOCKED,
329 .mask_core_ready = PLL_LOCKED,
356 .mask_core_ready = PLL_LOCKED,
368 .mask_core_ready = PLL_LOCKED,
/openbmc/u-boot/arch/arm/mach-exynos/include/mach/
H A Ddp_info.h89 PLL_LOCKED enumerator
/openbmc/linux/drivers/gpu/drm/bridge/analogix/
H A Danalogix_dp_core.h100 PLL_LOCKED enumerator
H A Danalogix_dp_reg.c226 return PLL_LOCKED; in analogix_dp_get_pll_lock_status()
/openbmc/linux/drivers/gpu/drm/bridge/cadence/
H A Dcdns-dsi-core.c129 #define PLL_LOCKED BIT(0) macro
707 writel(PLL_LOCKED, dsi->regs + MCTL_MAIN_STS_CLR); in cdns_dsi_hs_init()
711 status & PLL_LOCKED, 100, 100)); in cdns_dsi_hs_init()
/openbmc/u-boot/drivers/video/exynos/
H A Dexynos_dp.c813 if (ret != PLL_LOCKED) { in exynos_dp_config_video()
H A Dexynos_dp_lowlevel.c247 return PLL_LOCKED; in exynos_dp_get_pll_lock_status()