Home
last modified time | relevance | path

Searched refs:PLL_DDR_CONF_VAL (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/mips/mach-ath79/qca953x/
H A Dlowlevel_init.S55 #define PLL_DDR_CONF_VAL MK_PLL_DDR_CONF(0, 15, 1, 0) macro
144 li t1, PLL_DDR_CONF_VAL