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Searched refs:PLLE_MISC_VREG_CTRL (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c955 #define PLLE_MISC_VREG_CTRL(x) (((x) & 0x3) << 2) macro
983 value |= PLLE_MISC_VREG_CTRL(2); in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1140 #define PLLE_MISC_VREG_CTRL(x) (((x) & 0x3) << 2) macro
1194 value &= ~PLLE_MISC_VREG_CTRL(3); in tegra_plle_enable()