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Searched refs:PLLE_AUX_SS_SWCTL (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1147 #define PLLE_AUX_SS_SWCTL (1 << 6) macro
1245 value &= ~PLLE_AUX_SS_SWCTL; in tegra_plle_enable()
/openbmc/linux/drivers/clk/tegra/
H A Dclk-pll.c97 #define PLLE_AUX_SS_SWCTL BIT(6) macro
1684 val &= ~(PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL); in clk_plle_tegra114_enable()
2546 val |= PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL; in clk_plle_tegra210_disable()
H A Dclk-tegra210.c411 #define PLLE_AUX_SS_SWCTL (1 << 6) macro
529 value &= ~(PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL); in tegra210_plle_hw_sequence_start()