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Searched refs:PLLE_AUX_ENABLE_SWCTL (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra124/
H A Dclock.c959 #define PLLE_AUX_ENABLE_SWCTL (1 << 4) macro
971 value |= PLLE_AUX_ENABLE_SWCTL; in tegra_plle_enable()
/openbmc/u-boot/arch/arm/mach-tegra/tegra210/
H A Dclock.c1148 #define PLLE_AUX_ENABLE_SWCTL (1 << 4) macro
1246 value &= ~PLLE_AUX_ENABLE_SWCTL; in tegra_plle_enable()
/openbmc/linux/drivers/clk/tegra/
H A Dclk-pll.c96 #define PLLE_AUX_ENABLE_SWCTL BIT(4) macro
1631 val |= PLLE_AUX_ENABLE_SWCTL; in clk_plle_tegra114_enable()
1684 val &= ~(PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL); in clk_plle_tegra114_enable()
2546 val |= PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL; in clk_plle_tegra210_disable()
H A Dclk-tegra210.c410 #define PLLE_AUX_ENABLE_SWCTL (1 << 4) macro
529 value &= ~(PLLE_AUX_ENABLE_SWCTL | PLLE_AUX_SS_SWCTL); in tegra210_plle_hw_sequence_start()