Searched refs:PLANE_CTL_TILED_MASK (Results 1 – 3 of 3) sorted by relevance
220 plane->tiled = val & PLANE_CTL_TILED_MASK; in intel_vgpu_decode_primary_plane()
3639 #define PLANE_CTL_TILED_MASK REG_GENMASK(12, 10) macro3640 #define PLANE_CTL_TILED_LINEAR REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 0)3641 #define PLANE_CTL_TILED_X REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 1)3642 #define PLANE_CTL_TILED_Y REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 4)3643 #define PLANE_CTL_TILED_YF REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 5)3644 #define PLANE_CTL_TILED_4 REG_FIELD_PREP(PLANE_CTL_TILED_MASK, 5)
2442 tiling = val & PLANE_CTL_TILED_MASK; in skl_get_initial_plane_config()