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Searched refs:PIO_SCDR_DIV (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/pinctrl/
H A Dpinctrl-at91.h44 #define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ macro
H A Dpinctrl-at91.c546 writel_relaxed(div & PIO_SCDR_DIV, pio + PIO_SCDR); in at91_mux_pio3_set_debounce()
/openbmc/u-boot/arch/arm/mach-at91/include/mach/
H A Dat91_pio.h34 #define PIO_SCDR_DIV 0x3fff /* Slow Clock Divider Selection for Debouncing Mask */ macro
/openbmc/u-boot/drivers/pinctrl/
H A Dpinctrl-at91.c180 writel(div & PIO_SCDR_DIV, &pio->mux.pio3.scdr); in at91_mux_pio3_set_debounce()
/openbmc/u-boot/drivers/gpio/
H A Dat91_gpio.c332 writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr); in at91_pio3_set_pio_debounce()