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Searched refs:PEER_REG_RANGE1__END_ADDR__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h8047 #define PEER_REG_RANGE1__END_ADDR__SHIFT 0x00000010 macro
H A Dbif_4_1_sh_mask.h476 #define PEER_REG_RANGE1__END_ADDR__SHIFT 0x10 macro
H A Dbif_5_0_sh_mask.h502 #define PEER_REG_RANGE1__END_ADDR__SHIFT 0x10 macro
H A Dbif_5_1_sh_mask.h474 #define PEER_REG_RANGE1__END_ADDR__SHIFT 0x10 macro