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Searched refs:PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h7421 #define PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT 0x00000000 macro
H A Dbif_4_1_sh_mask.h2360 #define PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT 0x0 macro
H A Dbif_5_0_sh_mask.h2972 #define PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT 0x0 macro
H A Dbif_5_1_sh_mask.h3314 #define PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h43923 #define PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT … macro
H A Dnbio_7_0_sh_mask.h74593 #define PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT … macro
H A Dnbio_6_1_sh_mask.h39188 #define PCIE_PERF_CNTL_MST_R_CLK__EVENT0_SEL__SHIFT … macro