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Searched refs:PBCQ_NEST_MMIO_MASK0 (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/pci-host/
H A Dpnv_phb3_pbcq.c92 mask = pbcq->nest_regs[PBCQ_NEST_MMIO_MASK0]; in pnv_pbcq_update_map()
130 case PBCQ_NEST_MMIO_MASK0: in pnv_pbcq_nest_xscom_write()
253 pbcq->nest_regs[PBCQ_NEST_MMIO_MASK0] = 0x3fff000000000ull << 14; in pnv_pbcq_default_bars()
/openbmc/qemu/include/hw/pci-host/
H A Dpnv_phb3_regs.h28 #define PBCQ_NEST_MMIO_MASK0 0x43 macro