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Searched refs:PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2018 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_9_1_sh_mask.h1875 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_9_2_1_sh_mask.h1873 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_9_4_3_sh_mask.h1977 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_9_4_2_sh_mask.h15399 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_11_0_0_sh_mask.h24159 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h7584 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h26506 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h7906 #define PA_SC_ENHANCE_1__OPTIMAL_BIN_SELECTION__SHIFT … macro