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Searched refs:OTG_V_TOTAL_CONTROL (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn301/
H A Ddcn301_optc.c67 REG_UPDATE_2(OTG_V_TOTAL_CONTROL, in optc301_set_drr()
76 REG_UPDATE_5(OTG_V_TOTAL_CONTROL, in optc301_set_drr()
86 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc301_set_drr()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_optc.c181 REG_UPDATE_2(OTG_V_TOTAL_CONTROL, in optc31_set_drr()
196 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc31_set_drr()
205 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc31_set_drr()
H A Ddcn31_optc.h56 SRI(OTG_V_TOTAL_CONTROL, OTG, inst),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_optc.c234 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc32_setup_manual_trigger()
257 REG_UPDATE_2(OTG_V_TOTAL_CONTROL, in optc32_set_drr()
H A Ddcn32_resource.h1054 SRI_ARR(OTG_V_TOTAL_CONTROL, OTG, inst), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_optc.c933 REG_UPDATE_2(OTG_V_TOTAL_CONTROL, in optc1_set_drr()
942 REG_UPDATE_5(OTG_V_TOTAL_CONTROL, in optc1_set_drr()
1348 REG_GET(OTG_V_TOTAL_CONTROL, in optc1_read_otg_state()
1351 REG_GET(OTG_V_TOTAL_CONTROL, in optc1_read_otg_state()
H A Ddcn10_optc.h59 SRI(OTG_V_TOTAL_CONTROL, OTG, inst),\
131 uint32_t OTG_V_TOTAL_CONTROL; member
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddcn30_fpu.c216 REG_UPDATE_3(OTG_V_TOTAL_CONTROL, in optc3_fpu_set_vrr_m_const()
238 REG_UPDATE_3(OTG_V_TOTAL_CONTROL, in optc3_fpu_set_vrr_m_const()
244 REG_UPDATE_6(OTG_V_TOTAL_CONTROL, in optc3_fpu_set_vrr_m_const()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_optc.c469 REG_UPDATE_4(OTG_V_TOTAL_CONTROL, in optc2_setup_manual_trigger()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_optc.h57 SRI(OTG_V_TOTAL_CONTROL, OTG, inst),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_optc.h58 SRI(OTG_V_TOTAL_CONTROL, OTG, inst),\