Searched refs:OTG_M_CONST_DTO0 (Results 1 – 6 of 6) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 214 REG_SET(OTG_M_CONST_DTO0, 0, OTG_M_CONST_DTO_PHASE, 0); in optc3_fpu_set_vrr_m_const()
236 REG_SET(OTG_M_CONST_DTO0, 0, OTG_M_CONST_DTO_PHASE, 0); in optc3_fpu_set_vrr_m_const()
253 REG_SET(OTG_M_CONST_DTO0, 0, OTG_M_CONST_DTO_PHASE, (uint32_t)phase); in optc3_fpu_set_vrr_m_const()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/ |
| H A D | dcn314_optc.h | 65 SRI(OTG_M_CONST_DTO0, OTG, inst),\
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/ |
| H A D | dcn31_optc.h | 64 SRI(OTG_M_CONST_DTO0, OTG, inst),\
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_optc.h | 69 SRI(OTG_M_CONST_DTO0, OTG, inst),\
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/ |
| H A D | dcn10_optc.h | 188 uint32_t OTG_M_CONST_DTO0; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/ |
| H A D | dcn32_resource.h | 1061 SRI_ARR(OTG_M_CONST_DTO0, OTG, inst), \
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