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Searched refs:OTG_H_TIMING_CNTL (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn314/
H A Ddcn314_optc.c101 REG_UPDATE(OTG_H_TIMING_CNTL, in optc314_set_odm_combine()
179 REG_UPDATE(OTG_H_TIMING_CNTL, in optc314_set_odm_bypass()
191 REG_UPDATE(OTG_H_TIMING_CNTL, in optc314_set_h_timing_div_manual_mode()
H A Ddcn314_optc.h46 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn32/
H A Ddcn32_optc.c96 REG_UPDATE(OTG_H_TIMING_CNTL, in optc32_set_odm_combine()
105 REG_UPDATE(OTG_H_TIMING_CNTL, in optc32_set_h_timing_div_manual_mode()
212 REG_UPDATE(OTG_H_TIMING_CNTL, in optc32_set_odm_bypass()
H A Ddcn32_resource.h1046 SRI_ARR(OTG_H_TIMING_CNTL, OTG, inst), SRI_ARR(OTG_V_TOTAL, OTG, inst), \
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn20/
H A Ddcn20_optc.c178 REG_WRITE(OTG_H_TIMING_CNTL, 0); in optc2_set_odm_bypass()
181 REG_UPDATE(OTG_H_TIMING_CNTL, in optc2_set_odm_bypass()
225 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_BY2, 1); in optc2_set_odm_combine()
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn31/
H A Ddcn31_optc.c90 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc31_set_odm_combine()
227 REG_SET(OTG_H_TIMING_CNTL, 0, in optc3_init_odm()
H A Ddcn31_optc.h45 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/
H A Ddcn30_optc.c210 REG_SET(OTG_H_TIMING_CNTL, 0, in optc3_set_odm_bypass()
272 REG_SET(OTG_H_TIMING_CNTL, 0, OTG_H_TIMING_DIV_MODE, opp_cnt - 1); in optc3_set_odm_combine()
H A Ddcn30_optc.h47 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
/openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_optc.h46 SRI(OTG_H_TIMING_CNTL, OTG, inst),\
118 uint32_t OTG_H_TIMING_CNTL; member
H A Ddcn10_optc.c318 REG_UPDATE(OTG_H_TIMING_CNTL, in optc1_program_timing()
321 REG_UPDATE(OTG_H_TIMING_CNTL, in optc1_program_timing()