Home
last modified time | relevance | path

Searched refs:OSSSYS_HWIP (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dvega20_ih.c321 if ((adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 2, 1)) && in vega20_ih_irq_init()
334 if ((adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 0)) || in vega20_ih_irq_init()
335 (adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 2))) { in vega20_ih_irq_init()
364 if (adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 0) || in vega20_ih_irq_init()
365 adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 2)) in vega20_ih_irq_init()
573 (adev->ip_versions[OSSSYS_HWIP][0] == IP_VERSION(4, 4, 2))) in vega20_ih_sw_init()
590 if (adev->ip_versions[OSSSYS_HWIP][0] != IP_VERSION(4, 4, 2)) { in vega20_ih_sw_init()
H A Ddimgrey_cavefish_reg_init.c45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in dimgrey_cavefish_reg_base_init()
H A Daldebaran_reg_init.c42 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in aldebaran_reg_base_init()
H A Darct_reg_init.c43 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in arct_reg_base_init()
H A Damdgpu_discovery.c197 [OSSSYS_HWIP] = OSSSYS_HWID,
1713 switch (adev->ip_versions[OSSSYS_HWIP][0]) { in amdgpu_discovery_set_ih_ip_blocks()
1746 adev->ip_versions[OSSSYS_HWIP][0]); in amdgpu_discovery_set_ih_ip_blocks()
2165 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 0); in amdgpu_discovery_set_ip_blocks()
2187 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 0, 1); in amdgpu_discovery_set_ip_blocks()
2211 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 1); in amdgpu_discovery_set_ip_blocks()
2227 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 1, 0); in amdgpu_discovery_set_ip_blocks()
2248 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 0); in amdgpu_discovery_set_ip_blocks()
2272 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 2, 1); in amdgpu_discovery_set_ip_blocks()
2300 adev->ip_versions[OSSSYS_HWIP][0] = IP_VERSION(4, 4, 0); in amdgpu_discovery_set_ip_blocks()
H A Dvega10_reg_init.c46 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega10_reg_base_init()
H A Dvega20_reg_init.c45 adev->reg_offset[OSSSYS_HWIP][i] = (uint32_t *)(&(OSSSYS_BASE.instance[i])); in vega20_reg_base_init()
H A Dnavi10_ih.c110 if (adev->ip_versions[OSSSYS_HWIP][0] < IP_VERSION(5, 0, 3)) in force_update_wptr_for_self_int()
333 switch (adev->ip_versions[OSSSYS_HWIP][0]) { in navi10_ih_irq_init()
H A Dmes_v10_1.c308 adev->reg_offset[OSSSYS_HWIP][0][i]; in mes_v10_1_set_hw_resources()
H A Dmes_v11_0.c399 adev->reg_offset[OSSSYS_HWIP][0][i]; in mes_v11_0_set_hw_resources()
H A Damdgpu.h659 OSSSYS_HWIP, enumerator