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Searched refs:OR0 (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dstart.S1123 lwz r4, OR0@l(r3)
1126 stw r4, OR0@l(r3) /* OR0 <= OR0 & 0x00007FFFF */
1177 lwz r4, OR0(r3)
1180 stw r4, OR0(r3)
/openbmc/linux/arch/powerpc/include/asm/
H A Dfsl_lbc.h49 #define OR0 0x5004 macro
/openbmc/u-boot/arch/powerpc/cpu/mpc8xx/
H A DKconfig95 hex "Preliminary value for OR0"
/openbmc/u-boot/arch/powerpc/include/asm/
H A Dfsl_lbc.h86 #define OR0 0x5004 /* Register offset to immr */ macro
/openbmc/u-boot/include/
H A Dppc_asm.tmpl104 #define OR0 0x00000104
/openbmc/u-boot/
H A DREADME3132 Memory Controller Definitions: BR0/1 and OR0/1 (FLASH)