Searched refs:OPC_SHLL_OB_DSP (Results 1 – 1 of 1) sorted by relevance
/openbmc/qemu/target/mips/tcg/ |
H A D | translate.c | 370 OPC_SHLL_OB_DSP = 0x17 | OPC_SPECIAL3, enumerator 863 OPC_SHLL_PW = (0x10 << 6) | OPC_SHLL_OB_DSP, 864 OPC_SHLL_S_PW = (0x14 << 6) | OPC_SHLL_OB_DSP, 865 OPC_SHLLV_OB = (0x02 << 6) | OPC_SHLL_OB_DSP, 866 OPC_SHLLV_PW = (0x12 << 6) | OPC_SHLL_OB_DSP, 867 OPC_SHLLV_S_PW = (0x16 << 6) | OPC_SHLL_OB_DSP, 868 OPC_SHLLV_QH = (0x0A << 6) | OPC_SHLL_OB_DSP, 869 OPC_SHLLV_S_QH = (0x0E << 6) | OPC_SHLL_OB_DSP, 870 OPC_SHRA_PW = (0x11 << 6) | OPC_SHLL_OB_DSP, 871 OPC_SHRA_R_PW = (0x15 << 6) | OPC_SHLL_OB_DSP, [all …]
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